PIC CPU

In instructions with two operands, ordinarily one operand is in work register (W register), and the other is one of the registers or a constant. By operand we mean the contents on which some operation is being done, and a register is any one of the GPR or SFR registers. GPR is an abbreviation for 'General Purposes Registers', and SFR for 'Special Function Registers'. In instructions with one operand, an operand is either W register or one of the registers. As an addition in doing operations in arithmetic and logic, ALU controls status bits (bits found in STATUS register). Execution of some instructions affects status bits, which depends on the result itself. Depending on which instruction is being executed, ALU can affect values of Carry (C), Digit Carry (DC), and Zero (Z) bits in STATUS register.

Registers

OPTION Control Register

bit 7 RBPU (PORTB Pull-up Enable bit) This bit turns internal pull-up resistors on port B on or off.

1 = 'pull-up' resistors turned on
0 = 'pull-up' resistors turned off

bit 6 INTEDG (Interrupt Edge Select bit) If occurrence of interrupts was enabled, this bit would determine at what edge interrupt on RB0/INT pin would occur.

1 = rising edge
0 = falling edge

bit 5 T0CS (TMR0 Clock Source Select bit) This pin enables a free-run timer to increment its value either from an internal oscillator, i.e. every 1/4 of oscillator clock, or via external impulses on RA4/T0CKI pin.

1 = external impulses
0 = 1/4 internal clock

bit 4 T0SE (TMR0 Source Edge Select bit) If trigger TMR0 was enabled with impulses from a RA4/T0CKI pin, this bit would determine whether it would be on the rising or falling edge of a signal.

1 = falling edge
0 = rising edge

bit 3 PSA (Prescaler Assignment bit) Bit which assigns prescaler between TMR0 and watchdog timer.

1 = prescaler is assigned to watchdog timer.
0 = prescaler is assigned to free timer TMR0

Bit 0:2 PS0, PS1, PS2 (Prescaler Rate Select bit) In case of 4MHz oscillator, one instruction cycle (4 internal clocks) lasts 1µs. Numbers in the following table show the time period in µs between incrementing TMR or WDT.

Flag and Status Register (0x03h)

bit 7 IRP (Register Bank Select bit) Bit whose role is to be an eighth bit for purposes of indirect addressing the internal RAM.

1 = bank 2 and 3
0 = bank 0 and 1 (from 00h to FFh)

bits 6:5 RP1:RP0 (Register Bank Select bits) These two bits are upper part of the address for direct addressing. As instructions which address the memory directly have only seven bits, they need one more bit in order to address all 256 bytes which is how many bytes PIC16F84 has. RP1 bit is not used, but is left for some future expansions of this microcontroller. 01 = first bank 00 = zero bank

bit 4 TO Time-out ; Watchdog overflow. Bit is set after turning on the supply and execution of CLRWDT and SLEEP instructions. Bit is reset when watchdog gets to the end signaling that overflow took place.

1 = overflow did not occur
0 = overflow did occur

bit 3 PD (Power-down bit) This bit is set whenever power supply is brought to a microcontroller : as it starts running, after each regular reset and after execution of instruction CLRWDT. Instruction SLEEP resets it when microcontroller falls into low consumption mode. Its repeated setting is possible via reset or by turning the supply off/on . Setting can be triggered also by a signal on RB0/INT pin, change on RB port, upon writing to internal DATA EEPROM, and by a Watchdog.

1 = after supply has been turned on
0 = executing SLEEP instruction

bit 2 Z (Zero bit) Indication of a zero result This bit is set when the result of an executed arithmetic or logic operation is zero.

1 = result equals zero
0 = result does not equal zero

bit 1 DC (Digit Carry) DC Transfer Bit affected by operations of addition, subtraction. Unlike C bit, this bit represents transfer from the fourth resulting place. It is set in case of subtracting smaller from greater number and is reset in the other case.

1 = transfer occurred on the fourth bit according to the order of the result
0 = transfer did not occur

DC bit is affected by ADDWF, ADDLW, SUBLW, SUBWF instructions.

bit 0 C (Carry) Transfer Bit that is affected by operations of addition, subtraction and shifting.

1 = transfer occurred from the highest resulting bit 
0 = transfer did not occur

C bit is affected by ADDWF, ADDLW, SUBLW, SUBWF instructions.

EEProm data memory

EPROM memory is placed in a special memory space and can be accessed through special registers. These registers are:

EEDATA Holds read data or that to be written.
EEADR Contains an address of EEPROM location being accessed.
EECON1 Contains control bits.
EECON2 This register does not exist physically and serves to protect EEPROM from accidental writing.

bit 4 EEIF (EEPROM Write Operation Interrupt Flag bit) Bit used to inform that writing data to EEPROM has ended. When writing has terminated, this bit would be set automatically. Programmer must clear EEIF bit in his program in order to detect new termination of writing.

1 = writing terminated
0 = writing not terminated yet, or has not started

bit 3 WRERR (Write EEPROM Error Flag) Error during writing to EEPROM This bit was set only in cases when writing to EEPROM had been interrupted by a reset signal or by running out of time in watchdog timer (if activated).

1 = error occurred
0 = error did not occur

bit 2 WREN (EEPROM Write Enable bit) Enables writing to EEPROM If this bit was not set, microcontroller would not allow writing to EEPROM.

1 = writing allowed
0 = writing disallowed

bit 1 WR (Write Control bit) Setting of this bit initializes writing data from EEDATA register to the address specified trough EEADR register.

1 = initializes writing
0 = does not initialize writing

bit 0 RD (Read Control bit) Setting this bit initializes transfer of data from address defined in EEADR to EEDATA register. Since time is not as essential in reading data as in writing, data from EEDATA can already be used further in the next instruction.

1 = initializes reading
0 = does not initialize reading

Reading from EEPROM Memory

Setting the RD bit initializes transfer of data from address found in EEADR register to EEDATA register. As in reading data we don't need so much time as in writing, data taken over from EEDATA register can already be used further in the next instruction.

Writing to EEPROM Memory

In order to write data to EEPROM location, programmer must first write address to EEADR register and data to EEDATA register. Only then is it useful to set WR bit which sets the whole action in motion. WR bit will be reset, and EEIF bit set following a writing what may be used in processing interrupts. Values 55h and AAh are the first and the second key whose disallow for accidental writing to EEPROM to occur. These two values are written to EECON2 which serves only that purpose, to receive these two values and thus prevent any accidental writing to EEPROM memory. Therefore, it is very important to turn off interrupts which could change the timing needed for executing instructions. After writing, interrupts can be enabled again.

PIC assembly language

http://www.mikroelektronika.co.yu/english/product/books/PICbook/A_appendix.htm

Transfer of data in a microcontroller is done between work (W) register and an 'f' register that represents any location in internal RAM (regardless whether those are special or general purpose registers).

Table

f       any memory location in a microcontroller
W       work register
b       bit position in 'f' register
d       destination bit
label   group of eight characters which marks the beginning of a part of the program
TOS     top of stack
[]      option
<>      bit position inside register

  • 1 If I/O port is source operand, status on microcontroller pins is read
  • 2 If this instruction is executed on TMR register and if d=1, prescaler assigned to that timer will automatically be cleared
  • 3 If PC was modified, or test result =1, instruction was executed in two cycles.

Instructions

A.1 MOVLW Write constant in W register

A.2 MOVWF Copy W to f

A.3 MOVF Copy f to d

A.4 CLRW Write 0 in W

A.5 Write 0 in f

A.6 SWAPF Copy the nibbles from f to d crosswise

A.7 ADDLW Add W to a constant

A.8 ADDWF Add W to f

A.9 SUBLW Subtract W from a constant

A.10 SUBWF Subtract W from f

A.11 ANDLW Logic AND W with constant

A.12 ANDWF Logic AND W with f

A.13 IORLW Logic OR W with constant

A.14 IORWF Logic OR W with f

A.15 XORLW Logic exclusive OR W with constant

A.16 XORWF Logic exclusive OR W with f

A.17 INCF Increment f

A.18 DECF Decrement f

A.19 RLF Rotate f to the left through CARRY

A.20 RRF Rotate f to the right through CARRY

A.21 COMF Complement f

A.22 BCF Reset bit b in f

A.23 BSF Set bit b in f

A.24 BTFSC Test bit b in f, skip if it = 0

A.25 BTFSS Test bit b in f, skip if =1

A.26 INCFSZ Increment f, skip if=0

A.27 DECFSZ Decrement f, skip if = 0

A.28 GOTO Jump to address

A.29 CALL Call a program

A.30 RETURN Return from a subprogram

A.31 RETLW Return from a subprogram with constant in W

A.32 RETFIE Return from interrupt routine

A.33 NOP No operation

A.34 CLRWDT Initialize watchdog timer

A.35 SLEEP Stand by mode

 
wiki/pic/picasm.txt · Last modified: 17.12.2008 18:35 by rgareus